1. Technical Field
The present disclosure relates to a method of manufacturing a silicon substrate in which a cavity and through holes connected to the cavity are formed. More particularly, the present disclosure relates to a method of manufacturing a substrate capable of forming through holes in good profile and capable of preventing such a situation that side surfaces of the cavity are roughened by an etching process in forming the through holes.
2. Related Art
As a silicon substrate in which the cavity and the through holes connected to the cavity are formed, for example, there are known a wiring substrate applied to the light emitting device (see FIG. 1), a conductive ball sucking (mounting) substrate (see FIG. 2), and the like.
FIG. 1 is a sectional view of a light emitting device having a wiring substrate in the related art.
By reference to FIG. 1, a light emitting device 200 in the related art includes a wiring substrate 201, a light emitting element 202, and a glass substrate 203. The wiring substrate 201 has a silicon substrate 205, an insulating film 206, through silicon vias 208, and wirings 209.
The silicon substrate 205 is constructed such that a cavity 212 and through holes 213 are formed. The cavity 212 is formed on an upper surface 205A (a surface of the silicon substrate 205 on the side on which the glass substrate 203 is provided) side of the silicon substrate 205. The cavity 212 is a concave portion (housing portion) for housing the light emitting element 202 therein. The cavity 212 has a sectional shape whose width is widened gradually toward the upper side from a bottom surface 212A of the cavity 212. A side surface 212B of the cavity 212 is shaped as an inclined surface having a predetermined angle. The side surface 212B of the cavity 212 functions as a reflector for reflecting a light that the light emitting element 202 emits.
The through holes 213 are formed to pass through the portion, which is arranged beneath the cavity 212, of the silicon substrate 205. The insulating film 206 is provided to cover the upper surface 205A and a lower surface 205B of the silicon substrate 205, the bottom surface 212A and the side surface 212B of the cavity 212, and surfaces of portions, which correspond to the side surfaces of the through holes 213, of the silicon substrate 205.
The through silicon via 208 is provided in the through holes 213, on which the insulating film 206 is formed, respectively. Upper ends of the through silicon vias 208 are connected to the light emitting element 202, and lower ends thereof are connected to the wirings 209.
The wirings 209 are provided on the insulating film 206 arranged on the lower surface 205B of the silicon substrate 205 such that these wirings are connected to lower ends of the through silicon vias 208. The wirings 209 are connected to a mounting substrate (not shown) such as a motherboard, or the like.
The light emitting element 202 is housed in the cavity 212 and is connected to the through silicon vias 208. Accordingly, the light emitting element 202 is connected electrically to the wirings 209 via the through silicon vias 208. The glass substrate 203 is provided on the portion, which is formed on the upper surface 205A of the silicon substrate 205, of the insulating film 206 to airtightly seal the cavity 212 in which the light emitting element 202 is housed.
FIG. 2 is a sectional view of the conductive ball sucking (mounting) substrate in the related art. In FIG. 2, such a state is schematically shown that conductive balls 231 are sucked by the conductive ball sucking substrate 230.
By reference to FIG. 2, the conductive ball sucking substrate 230 in the related art is constructed such that cavities 236 and through holes 237 are formed in a silicon substrate 235.
The cavities 236 are formed on the lower surface 235B side of the silicon substrate 235. The cavity 236 is a concave portion (housing portion) for restricting a position of the conductive ball 231 when the conductive ball 231 is sucked. The cavities 236 are connected to the through holes 237 respectively. The cavity 236 has a sectional shape whose width is widened gradually as a distance from the through hole 237 is increased. A side surface 236B of the cavity 236 is formed as an inclined surface having a predetermined angle. The side surface 236B of the cavity 236 contacts the conductive ball 231 when the conductive ball 231 is sucked.
The through holes 237 are formed to pass through the portions, which are arranged over the cavities 236, of the silicon substrate 235 respectively. The through holes 237 are connected to an exhaust equipment (not shown). When an air in the cavities 236 is exhausted by the exhaust equipment via the through holes 237, the cavities 236 allow the conductive ball 231 to be sucked respectively.
The conductive ball sucking substrate 230 constructed as above is the substrate for mounting the conductive balls 231 on the pads (pads coated with adhesive) of the wiring substrate (not shown). In this case, the cavities 236 and the through holes 237 provided in the conductive ball sucking substrate 230 can be formed by the similar approach to that applied to the cavities 212 and the through holes 213 provided in the wiring substrate 200.
FIGS. 3 to 11 are views showing steps of manufacturing a wiring substrate in the related art. In FIG. 3 to FIG. 11, the same reference symbols are affixed to the same constituent portions as those of the wiring substrate 200 shown in FIG. 1 in the related art.
Then, a method of manufacturing the wiring substrate 201 will be described with reference to FIG. 3 to FIG. 1 hereunder. At first, in steps shown in FIG. 3, the silicon substrate 205 (the silicon substrate 205 in a state before the cavities 212 and the through holes 213 are formed) is prepared. The silicon substrate 205 is the silicon substrate whose surface 205A is formed as a <100> face.
Then, in steps shown in FIG. 4, an insulating film 241 is formed on both surfaces 205A, 205B of the silicon substrate 205. Then, a resist film 243 having an opening 243A on the insulating film 241 formed on the surface 205A of the silicon substrate 205 is formed. The opening 243A is formed to expose the portion of the insulating film 241 corresponding to a forming area of the cavity 212.
Then, in steps shown in FIG. 5, the insulating film 241 exposed from the opening 243A is removed by the etching using the resist film 243 as a mask, and thus an opening 241A is formed in the insulating film 241. The opening 241A is formed to expose the surface 205A of the silicon substrate 205. Then, in steps shown in FIG. 6, the resist film 243 shown in FIG. 5 is removed.
Then, in steps shown in FIG. 7, the silicon substrate 205 is etched by the wet etching using the insulating film 241 having the opening 241A as a mask. Thus, the cavity 212 whose side surface 212B is shaped into an inclined surface is formed.
Then, in steps shown in FIG. 8, the insulating film 241 formed on both surfaces 205A, 205B of the silicon substrate 205 is removed. Then, in steps shown in FIG. 9, a resist film 245 having openings 245A is formed on the surface 205B (surface of the silicon substrate 205 opposite to the side on which the cavity 212 is formed) of the silicon substrate 205. At this time, the openings 245A are formed to expose the portions, which correspond to the forming areas of the through holes 213, of the surface 205B of the silicon substrate 205.
Then, in steps shown in FIG. 10, the through holes 213 are formed by etching the silicon substrate 205 from the surface 205B side of the silicon substrate 205 by the anisotropic etching method while using the resist film 245 as a mask (through hole forming step).
Then, in steps shown in FIG. 11, the insulating film 206 is formed by the well-known approach to cover the portions of the surfaces of the silicon substrate 205 corresponding to the bottom surface 212A and the side surface 212B of the cavity 212, the portions of the surfaces of the silicon substrate 205 corresponding to the side surfaces of the through holes 213, and both surfaces 205A, 205B of the silicon substrate 205. As a result, the wiring substrate 201 is manufactured (see e.g., JP-A-2007-201361).
FIG. 12 is a sectional view to describe the problems in the method of manufacturing the wiring substrate in the related art. In FIG. 12, the same reference symbols are affixed to the same constituent portions as those of the structure described previously and shown in FIG. 10.
However, as shown in FIG. 12, in the method of manufacturing the wiring substrate 201 in the related art, the cavity 212 is formed by applying the wet etching to the silicon substrate 205 from the surface 205A side of the silicon substrate 205. Then, the portions of the silicon substrate 205, which are arranged beneath the cavity 212, are etched by applying the anisotropic etching from the surface 205B side of the silicon substrate 205. Thus, the through holes 213 are formed.
For this reason, such problems existed that a notch E is generated at the edge portions of the through holes 213 located near the bottom surface 212A of the cavity 212 and also the side surfaces 212B of the cavity 212 are roughened by the anisotropic etching in forming the through holes 213. For example, when the notch is generated on the through holes 213, reliability of the electrical connection between the through silicon vias 208 and the light emitting element 202 is lowered. Also, when the side surfaces 212B of the cavity 212 are roughened, such side surfaces 212B of the cavity 212 do not function as the reflector that reflects a light that the light emitting element 202 emits.
For example, when the notch is generated on the silicon substrate 235 provided to the conductive ball sucking substrate 230 or when the side surfaces of the cavities 236 are roughened, a breakage of the conductive ball sucking substrate 230 or a defective suction of the conductive balls 231 might be caused.